[QUOTE] the 'leccy was shit full stop.[/QUOTE] I have a vague memory that tells me that was because it used a single 64K x 4 bit DRAM to make up the 32K RAM space to keep costs down, and it thus had to do two sequential accesses for each CPU read. Can't remember if it had the 1MHz or the blisteringly fast BBC-B 2MHz 6502 though.